Field
Embodiments of the invention generally relate to semiconductor manufacturing. More specifically, embodiments disclosed herein are related to barrier layers between dissimilar materials.
Description of the Related Art
One of the primary steps in the fabrication of modern semiconductor devices is the formation of metal and dielectric films on a substrate by chemical reaction of gases. Such deposition processes are referred to as chemical vapor deposition or CVD. Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. The high temperatures at which some thermal CVD processes operate can damage device structures having layers previously formed on the substrate. Another method of depositing metal and dielectric films at relatively low temperatures is plasma-enhanced CVD (PECVD) techniques. PECVD techniques promote excitation and/or disassociation of the reactant gases by the application of energy, such as radio frequency (RF) energy, to a reaction zone near the substrate surface, thereby creating a plasma of highly reactive species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place, and thus lowers the required temperature for such PECVD processes.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices that will fit on a chip doubles every two years. Today's fabrication plants are routinely producing devices having 0.35 μm and even 0.25 μm feature sizes, and tomorrow's plants soon will be producing devices having even smaller geometries.
In order to further reduce the size of devices on integrated circuits, it has become necessary to use conductive materials having low resistivity and insulators having low k (dielectric constant<2.5) to reduce the capacitive coupling between adjacent metal lines. Liner/barrier layers have been used between the conductive materials and the insulators to prevent diffusion of byproducts such as moisture onto the conductive material. For example, moisture that can be generated during formation of a low k insulator readily diffuses to the surface of the conductive metal and increases the resistivity of the conductive metal surface. A barrier/liner layer formed from organosilicon or organosilane nitride materials can block the diffusion of the byproducts.
As geometries of device have continued to scale down, the need for device speed, characterized by RC delay, is significantly affected by the effective dielectric constant (keffective) of the ultra-low k dielectric film combined with a copper diffusion dielectric barrier film (also known as a dielectric barrier layer). The dielectric barrier layer should have either a lower k value or a reduced thickness to help to reduce the keffective. However, current barrier layers have minimum thickness requirements to overcome difficulties created by other processing steps. For example, UV irradiation used in the process of producing porous ultra-low k dielectric film (e.g., low k insulators) can induce great stress change and degradation of electrical property. The UV radiation creates pores while simultaneously shrinking the barrier layer, which induces a stress change and creates a degradation of electrical properties.
Therefore, ultra-thin low k Cu barrier films with UV compatibility and good conformality are needed.